Instruction selection
http://dbpedia.org/resource/Instruction_selection an entity of type: WikicatCompilerOptimizations
In computer science, instruction selection is the stage of a compiler backend that transforms its middle-level intermediate representation (IR) into a low-level IR. In a typical compiler, instruction selection precedes both instruction scheduling and register allocation; hence its output IR has an infinite set of pseudo-registers (often known as temporaries) and may still be – and typically is – subject to peephole optimization. Otherwise, it closely resembles the target machine code, bytecode, or assembly language. For example, for the following sequence of middle-level IR code
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Instruction selection
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InternetArchiveBot
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January 2020
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In computer science, instruction selection is the stage of a compiler backend that transforms its middle-level intermediate representation (IR) into a low-level IR. In a typical compiler, instruction selection precedes both instruction scheduling and register allocation; hence its output IR has an infinite set of pseudo-registers (often known as temporaries) and may still be – and typically is – subject to peephole optimization. Otherwise, it closely resembles the target machine code, bytecode, or assembly language. For example, for the following sequence of middle-level IR code t1 = at2 = bt3 = t1 + t2a = t3b = t1 a good instruction sequence for the x86 architecture is MOV EAX, aXCHG EAX, bADD a, EAX For a comprehensive survey on instruction selection, see.
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